发明名称 DISPLAY SYSTEM OF MINICOMPUTER
摘要 PURPOSE:To display a general expression having the correspondent relation of 1:1 to the inputted calculation expression and hold the display of the general expression for a prescribed time after the operation end. CONSTITUTION:RAM3 has registers X, Y and Z, registers, for example, A-J, a display buffer register, etc. Data read from registers of RAM3 and data inputted from key input part 8 are inputted to operating circuit 7, and circuit 7 executs the operation, and the operation result is inputted to the designated register in RAM3. When display instruction signal D is outputted from instruction decoder 4 and is given to decoder 10 at the key operation time of key input part 8, data read from RAM3 at this time is read into decoder 10 and is sent to display part 9. Decoder 10 decodes signal expression data inputted to the display buffer of RAM3 and sends it to display part 9.
申请公布号 JPS56153463(A) 申请公布日期 1981.11.27
申请号 JP19800056193 申请日期 1980.04.30
申请人 CASIO COMPUTER CO LTD 发明人 ITOU HISASHI
分类号 G06F3/147;G06F15/02 主分类号 G06F3/147
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