Test circuit for writing multi byte into semiconductor memory - has several data bus line selectors, forming data input buffer circuit outputs

摘要

The memory has several line row blocks wiht a number of input and output lines, with several data input buffer circuits for buffer storing of input data in an input data write data bus lines. There are several data bus selectors for the data bus lines, forming outputs of the data input buffer circuits according to a control cycle received by a data bus control cycle generator. - Several clock pulse generators provide a control clock pulse signal for operation of a corresponding data input, based on a test mode release signal and a column-line address signal. Several individual data input drive stages are provided for each output of the data bus selectors, providing driven output signals for the input and output lines.