Method for manufacturing graphene transistor based on self-aligning technology

摘要

A method for manufacturing a graphene transistor based on self-aligning technology, the method comprising: on a substrate (1), forming sequentially graphene material (4), a metal film (5), and photoresist patterns (6) formed by lithography, removing the metal film and the graphene material uncovered by the photoresist, forming an active area, and metal electrodes (7, 8, 9) of a source, a gate, and a drain of the transistor, wherein the source electrode 7 and drain electrode 9 are connected with a metal of the active region, and forming gate photoresist patterns (10) between the source and the drain by lithography, etching off the exposed metal, forming sequentially a seed layer (11), a gate dielectric layer (12), and gate metal (13) on the exposed graphene surface, and finally forming a graphene transistor.

主权项

1. A method for producing a graphene transistor based on self-aligning technology comprising:
forming a graphene layer on a substrate; depositing a metal layer on the graphene layer; covering a desired region on the metal layer with a first photoresist pattern; using the first photoresist pattern as a mask to remove a first exposed portion of the metal; using the first photoresist pattern as a mask to etch away an exposed portion of the graphene layer prior to removing the first photoresist; forming metal electrodes of a source electrode and drain electrode, wherein the source electrode and drain electrode are connected with a remaining portion of the metal layer corresponding to an active region; forming a gate mask pattern from a second photoresist to expose a second portion of the metal layer between the source electrode and the drain electrode; using the gate mask pattern of the second photoresist as a mask to remove the second portion of the exposed metal thereby exposing a portion of the graphene layer; forming a gate dielectric seed layer on the exposed portion of the graphene layer by using the gate pattern of the second photoresist as a mask; forming a gate dielectric on the gate dielectric seed layer; forming a gate electrode on the gate dielectric and then removing the photoresist.