发明名称 |
NOISE ELIMINATING CIRCUIT |
摘要 |
PURPOSE:To eliminate 1/f noise outputted from a solid-state image pickup element by utilizing a reset pulse phiR and a circular phase pulse phiC which are used to set a reference voltage in an element as sample pulses of the output signal of the element. CONSTITUTION:A transistor (TR)8 is in a cutoff state during a period TS wherein a control pulse phiS is at a level L to hold the voltage Vc across a capacitor 13, the emitter voltage of a TR6 becomes VBE lower than the voltage Vo at an output terminal 5, and the collector voltage V1 of a TR8 becomes further Vc lower. The output Vo at the terminal 5 varies from VRESET to VSIG during signal output with regard to its DC level, so V1=(VSIG-VRESET)+VGL is derived. Assuming that the noise component does not vary in one period, then V1= VCL-S is derived and the varying noise component N is eliminated to obtain only a signal component N. |
申请公布号 |
JPS59160384(A) |
申请公布日期 |
1984.09.11 |
申请号 |
JP19830034274 |
申请日期 |
1983.03.01 |
申请人 |
MATSUSHITA DENKI SANGYO KK |
发明人 |
HANAOKA YUUJI;FUJIMOTO MAKOTO |
分类号 |
H04N5/30;H04N5/335;H04N5/357;H04N5/372;H04N5/374;H04N5/378 |
主分类号 |
H04N5/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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