| 发明名称 | Semiconductor device | ||
| 摘要 | A semiconductor device includes a first fin-shaped semiconductor layer on a semiconductor substrate, a first insulating film around the first fin-shaped semiconductor layer, a first pillar-shaped semiconductor layer on the first fin-shaped semiconductor layer, a first gate insulating film around the first pillar-shaped semiconductor layer, a first gate line formed around the first gate insulating film and extending in a direction perpendicular to the first fin-shaped semiconductor layer, a second diffusion layer disposed in a lower portion of the first pillar-shaped semiconductor layer, a third gate insulating film surrounding an upper portion of the first pillar-shaped semiconductor layer, a first contact electrode surrounding the third gate insulating film, a second contact electrode that connects an upper portion of the first contact electrode to an upper portion of the first pillar-shaped semiconductor layer, and a first magnetic tunnel junction memory element on the second contact electrode. | ||
| 申请公布号 | US9368551(B2) | 申请公布日期 | 2016.06.14 |
| 申请号 | US201514789370 | 申请日期 | 2015.07.01 |
| 申请人 | UNISANTIS ELECTRONICS SINGAPORE PTE. LTD. | 发明人 | Masuoka Fujio;Nakamura Hiroki |
| 分类号 | H01L29/00;H01L43/00;H01L27/22;H01L27/088;H01L29/78;H01L29/66;H01L21/8234;H01L43/12;H01L29/423 | 主分类号 | H01L29/00 |
| 代理机构 | Brinks Gilson & Lione | 代理人 | Brinks Gilson & Lione |
| 主权项 | 1. A semiconductor device comprising: a first fin-shaped semiconductor layer on a semiconductor substrate; a first insulating film around the first fin-shaped semiconductor layer; a first pillar-shaped semiconductor layer on the first fin-shaped semiconductor layer; a first gate insulating film around the first pillar-shaped semiconductor layer; a first gate line around the first gate insulating film and extending in a direction perpendicular to the first fin-shaped semiconductor layer; a diffusion layer in a lower portion of the first pillar-shaped semiconductor layer; a third gate insulating film surrounding an upper portion of the first pillar-shaped semiconductor layer; a first contact electrode surrounding the third gate insulating film, wherein an upper portion of the first contact electrode is electrically connected to the upper portion of the first pillar-shaped semiconductor layer; and a first magnetic tunnel junction memory element electrically connected to the upper portion of the first pillar-shaped semiconductor layer. | ||
| 地址 | Peninsula Plaza SG | ||