ON-DIE TERMINATION CONTROL

摘要

A memory control component outputs a memory write command to a memory IC and also outputs write data to be received via data inputs of the memory IC. Prior to reception of the write data within the memory IC, the memory control component asserts a termination control signal that causes the memory IC to apply to the data inputs a first on-die termination impedance during reception of the write data followed by a second on-die termination impedance after the write data has been received. The memory control component deasserts the termination control signal to cause the memory IC to apply no termination impedance to the data inputs.

主权项

1. A method of controlling an integrated-circuit memory device (“memory IC”), the method comprising:
outputting a memory write command to the memory IC; outputting write data to be received via data inputs of the memory IC; prior to reception of the write data within the memory IC, asserting a termination control signal that causes the memory IC to apply to the data inputs a first on-die termination impedance during reception of the write data followed by a second on-die termination impedance after the write data has been received; and deasserting the termination control signal to cause the memory IC to apply no termination impedance to the data inputs.