Metal-oxide-semiconductor (MOS) transistor structure integrated with a resistance random access memory (RRAM) and the manufacturing methods thereof

摘要

The present invention belongs to the technical field of semiconductor memories, in particular to a metal oxide semiconductor (MOS) transistor structure integrated with a resistance random access memory (RRAM). The MOS transistor structure comprises a MOS transistor and a RRAM formed on a substrate, wherein a gate dielectric layer of said MOS transistor extends to the surface of a drain region of said MOS transistor; and the part of the gate dielectric layer on the surface of the drain region of said MOS transistor forms a resistance-variable storage layer of said RRAM. In this invention, the high-quality dielectric layer of the MOS transistor and the resistance-variable storage layer of the RRAM are obtained by primary atomic layer deposition which integrates the RRAM and MOS transistor together without increasing steps. This process is simple and can combine the shallow trench isolation or field oxygen isolation and ion implantation or diffusion of source electrode and drain electrode to make integration convenient.

主权项

1. A method for manufacturing a field effect transistor structure integrated with a RRAM comprising a field effect transistor structure integrated with a resistance random access memory (RRAM), comprising:
a semiconductor substrate; a field effect transistor and a RRAM formed on said semiconductor substrate; wherein: a gate dielectric layer of said field effect transistor extending over, approximately, an entire top surface of a drain region of said field effect transistor; and the part of the gate dielectric layer on the surface of the drain region of the field effect transistor forms a resistance-variable storage layer of said RRAM; comprising: forming a primary insulating film on the surface of a semiconductor substrate of a primary doping type; etching said primary insulating film to expose positions of a source region and a drain region of a field effect transistor; forming a source region and a drain region of a second doping type in said semiconductor substrate; etching to remove the rest of the said primary insulating film; growing a second insulating film on the surface of said semiconductor substrate by atomic layer deposition; depositing a primary conductive film on said second insulating film; etching said primary conductive film to form a gate electrode of the field effect transistor; and etching to remove the second insulating film above said source region while preserving the second insulating film covering the entire surface of the drain region; wherein the gate dielectric layer is the second insulating film.