发明名称 SEMICONDUCTOR DEVICE, FABRICATING METHOD THEREOF AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICONDUCTOR DEVICE
摘要 In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
申请公布号 US2016233155(A1) 申请公布日期 2016.08.11
申请号 US201615130904 申请日期 2016.04.15
申请人 LEE Ho-Jin;CHO Tae-Je;JANG Dong-Hyeon;SONG Ho-Geon;JEONG Se-Young;KANG Un-Byoung;YOON Min-Seung 发明人 LEE Ho-Jin;CHO Tae-Je;JANG Dong-Hyeon;SONG Ho-Geon;JEONG Se-Young;KANG Un-Byoung;YOON Min-Seung
分类号 H01L23/498;H01L23/48 主分类号 H01L23/498
代理机构 代理人
主权项 1. A semiconductor device comprising: a semiconductor substrate having a first surface and a second surface opposite to the first surface, the second surface defining a redistribution trench, the substrate having a via hole extending therethrough; a through via disposed in the via hole, the through via including a via hole insulating layer and a conductive connector sequentially formed therein; an insulation layer pattern formed on the second surface of the substrate, the insulation layer pattern defining an opening that exposes a region of a top surface of the through via; and a redistribution layer disposed in the redistribution trench and electrically connected to the through via, wherein the insulation layer pattern covers an interface region between the second surface of the substrate and a top surface of the via hole insulating layer.
地址 Seoul KR