发明名称 |
HIGH-POTENTIAL DETECTION CIRCUIT |
摘要 |
<p>PURPOSE:To obtain a high-potential detection circuit which can limit a stress voltage which is applied between a gate and a source of a MOS transistor of an inverter circuit for shaping waveform when detecting a high-potential input by an input-stage circuit and can prevent deterioration and damage of a gate insulation film. CONSTITUTION:An enhancement-type PMOS transistor PI and an enhancement- type NMOS transistor N1 where the source and the back gate are short-circuited are connected in series between an input node and a grounding potential node and are provided with an input stage circuit 12 where the drain of the NMOS transistor N1 becomes an output node and a waveform-shaping circuit 13 which is connected to the next stage of the input-starve circuit. Furthermore, a depletion-type MOS transistor ND which is inserted in series with a path between the input node of the input stage circuit and that of the waveform-shaping circuit and whose gate is connected to a power supply potential node is provided.</p> |
申请公布号 |
JPH05288782(A) |
申请公布日期 |
1993.11.02 |
申请号 |
JP19920094273 |
申请日期 |
1992.04.14 |
申请人 |
TOSHIBA CORP |
发明人 |
BANBA HIRONORI;ATSUMI SHIGERU |
分类号 |
G01R19/165;G11C16/06;G11C17/00;H03K19/003;(IPC1-7):G01R19/165 |
主分类号 |
G01R19/165 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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