发明名称 LDO regulator having variable gain depending on automatically detected output capacitance
摘要 The present invention concerns a low dropout (LDO) regulator of regulating an output signal, the LDO regulator comprising an input stage (15) and an output stage (17), the input stage being adapted to receive a reference signal (VREF) and a feed-back signal (VF) depending on an output signal (VOUT), and to output an intermediate signal based on the feedback signal and on the reference signal, wherein the LDO regulator further comprises a gain stage (16) having a given gain value, which is configurable and wherein the output signal is regulated based on the gain value of the gain stage and on the intermediate signal.
申请公布号 US9423809(B2) 申请公布日期 2016.08.23
申请号 US201214350253 申请日期 2012.09.27
申请人 ST-Ericsson SA 发明人 Pons Alexandre;Lebon Frédéric
分类号 G05F1/575;G05F1/10 主分类号 G05F1/575
代理机构 Coats & Bennett, PLLC 代理人 Coats & Bennett, PLLC
主权项 1. A low dropout (LDO) regulator operative to regulate an output signal, said LDO regulator comprising an output stage adapted to be connected to an output capacitor having a capacitance value; a capacitance measuring circuit operative to determine the capacitance value of the output capacitor and to indicate the capacitance value falls within one of at least two non-zero capacitance value ranges, comprising a first circuit operative to measure a charging time of the output capacitor, and a second circuit operative to compare said charging time with predefined time windows to determine the range of capacitance values into which the output capacitor falls; an input stage adapted to receive a reference signal and a feedback signal depending on the output signal, and to output an intermediate signal based on said feedback signal and on said reference signal; a gain stage having a configurable gain value and operative to generate one of at least two gain values based on the indicated range of capacitance value; wherein the output signal is regulated based on the gain value of the gain stage and on the intermediate signal; a first circuit operative to measure a charging time of the output capacitor; and a second circuit operative to compare said charging time with predefined time windows to determine the range of capacitance values into which the output capacitor falls.
地址 Plan-les-Ouates CH