发明名称 Error correction within a cache memory
摘要 A cache memory includes error bits corresponding to each line of data. An error detecting circuit uses these error bits to detect if a soft error has occurred within the data of a cache line. If such an error has occurred, then the line may be refilled from the main memory or some other action taken, such as a write back or generation of a soft error abort signal.
申请公布号 US7328391(B2) 申请公布日期 2008.02.05
申请号 US20040880618 申请日期 2004.07.01
申请人 ARM LIMITED 发明人 HART DAVID KEVIN;MCGLEW PATRICK GERARD;BURDASS ANDREW
分类号 G06F12/08;H03M13/00;G06F11/10;G06F12/16 主分类号 G06F12/08
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