发明名称 ELECTRIC FIELD EFFECT TRANSISTOR LOAD CIRCUIT
摘要 <p>PURPOSE:To cause a clamp current, which flows in the input side of the logic circuit of a next step, to be small, to cause energy consumption to be low and to improve the stability of operation by serially connecting a first FET (DFET) of a normally-on type, in which a gate and a source are connected, and a second DFET of the normally-on type, in which the gate is grounded, between a power source voltage and a node for driving circuit connection. CONSTITUTION:The voltage between gate and source of a DFET31 is constant at 0V and when a voltage between drain and source is small, the DFET31 goes to a non-satulating condition and it is operated as a resistance. When the voltage between drain and source is large, the DFET31 is satulated and it is operated as a constant current source. When a potential Va goes to be lowered, the conductance of a DFET32 goes to be large. When the potential Va goes to be larger than the conductance of the DFET31, the voltage of a load circuit 30 is pressure-divided into the both DFETs 31 and 32. Accordingly, since the DFET31 is satulated and goes to be the constant current source, a load characteristic can be obtained so that the conductance can go to be small rapidly.</p>
申请公布号 JPH01162016(A) 申请公布日期 1989.06.26
申请号 JP19870320647 申请日期 1987.12.18
申请人 OKI ELECTRIC IND CO LTD 发明人 TANOI SATOSHI
分类号 G11C11/41;G11C7/12;G11C11/419;H03H11/46;H03K19/094;H03K19/0952 主分类号 G11C11/41
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