发明名称 Semiconductor memory device having a pad arrangement with reduced occupying area
摘要 On a surface of a semiconductor chip having a longer side and a shorter side, a line of a plurality of first pads and a line of a plurality of second pads are arranged in the shape of a cross. Upon multibit expansion, increase in length of the longer side of semiconductor chip can be suppressed even though the number of pads is increased by additionally providing the second pad. In addition, there is no need to reduce the pitch between pads. Thus, a semiconductor memory device allowing multibit expansion is provided without an increase in size of the chip and the pad or reduction in pitches between pads and between pins.
申请公布号 US6150728(A) 申请公布日期 2000.11.21
申请号 US19970854754 申请日期 1997.05.12
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TSUKUDE, MASAKI;ARIMOTO, KAZUTAMI
分类号 G11C11/401;H01L21/321;H01L21/60;H01L21/8242;H01L23/495;H01L23/50;H01L27/105;H01L27/108;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 主分类号 G11C11/401
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