发明名称 Single interconnect, multi-bit interface
摘要 Disclosed is transmission of a signal over a single interconnect between functional blocks of the IC. A scaled or encoded signal responsive to a first digital signal is generated by summing currents responsive to the first control signal. The summed currents, which may be the sum of one or more currents, is the scaled signal. The encoded signal is transmitted over a single interconnect. This transmission occurs in one clock period in contrast to the at least two clock periods required to serially transmit data. The encoded signal is then used to generate a second digital signal. The generation of the second digital signal preferably includes mirroring the current of the encoded signal. The mirrored current is can then generate one or more separate voltages which are used to generate the second digital signal.
申请公布号 US6476736(B2) 申请公布日期 2002.11.05
申请号 US20010941245 申请日期 2001.08.27
申请人 APPLIED MICRO CIRCUITS CORPORATION 发明人 BARTLETT DONALD M.
分类号 H04L25/49;(IPC1-7):H03M5/02 主分类号 H04L25/49
代理机构 代理人
主权项
地址