发明名称 WAVEFORM SIGNAL REGENERATION CIRCUIT
摘要 PURPOSE:To allow the titled circuit to cope with a steep waveform signal caused partially by preparing encoded data of an optional bit number separately in addition to encoded data having a bit number used normally without increasing a quantized bit number simply. CONSTITUTION:An encoded data storage section 11 stores encoded data of, e.g., 4 bits obtained by encoding an original waveform in advance, and another encoded data storage section 12 stores encoded data of, e.g., 8 bits obtained by encoding the original waveform in advance. An output control section 13 checks the content of the encoded data DA from the data storage section 11, and selects the said encoded date DA when the said data is not selection change data and gives the result to a decoding circuit 14 as a DO. On the other hand, when the data is the selection change data, the output control section 13 selects the coded data DB from the data storage section 12 and sends it as the DO to the decoding circuit 14. By increasing the bit number of the coded data storage section 12 more than the bit number of the encoded data storage section 11, the titled circuit copes with a wider change than that at the normal state in case of the selection change.
申请公布号 JPS6318727(A) 申请公布日期 1988.01.26
申请号 JP19860162299 申请日期 1986.07.10
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 SHINKAI HIROSHI
分类号 G10L19/00;H03M3/04 主分类号 G10L19/00
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