| 摘要 |
In a circuit for addressing a data store with an address having a portion identifying a character location having several byte locations and a portion identifying one of the bytes within the addressed character location, means is provided for addressing a number of bytes per character that is not an integral power of 2. The two address portions are used conventionally for addressing a first part of the store in which the number of byte positions for each character is an integral power of 2. A second part of the store holds the next byte position for each character and is addressed by the combination of a set of fixed address bits and the character portion of the address used for addressing the first part of the store.
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