发明名称 Method of test of clock generation circuit in electronic device, and electronic device
摘要 In an electronic device having an interface circuit which operates using a fast clock source, frequency deviation of the clock source is inspected in the mounted state. The clock pulses of the fast clock source are counted in synchronization with an electronic device serving as reference, and the result is checked; or, alignment data of transfer data and overflow/underflow of the FIFO buffer are utilized; or, the count values of an internal counter and a fast clock counter are utilized, to check for frequency deviation of the fast clock source. In the state of being mounted in the device, tests can be performed of the clock sources of all units.
申请公布号 US7272527(B1) 申请公布日期 2007.09.18
申请号 US20060487504 申请日期 2006.07.17
申请人 FUJITSU LIMITED 发明人 SUTO HIROYUKI;KANEGAE MASAHIDE;KAWASHIMA OSAMU;UMEDA MICHIHIKO
分类号 G06F1/04 主分类号 G06F1/04
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