发明名称 |
METHOD AND APPARATUS TO SOLVE PFC CAPACITOR REDUCTION OF LINE AFLC RIPPLE WITHOUT PASSIVE FILTERS |
摘要 |
Audio Frequency Load Control (AFLC) signal processing electronics are provided, which added to a power factor correction (PFC) unit allowing the AFLC system to operate without the need of large and heavy passive bypass or blocking filters at the PFC installations. The AFLC signal processing electronics comprise a first group of additional electronics tuned to the AFLC frequency for detecting the AFLC carrier signal and a second group of additional electronics for driving an AFLC impedance switch (306) that is connected in parallel with an AFLC impedance (305). The AFLC impedance (305) is connected in series with the PFC capacitors (304), and is sufficiently large to offer significant impedance in series with the PFC capacitors (304) that allow the AFLC signal to bypass the PFC unit. |
申请公布号 |
WO2016138847(A1) |
申请公布日期 |
2016.09.09 |
申请号 |
WO2016CN75144 |
申请日期 |
2016.03.01 |
申请人 |
EDGE ELECTRONS LIMITED |
发明人 |
STEWART, Neal George;CHENG, Wing Ling |
分类号 |
H04B3/54;H02M1/12 |
主分类号 |
H04B3/54 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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