发明名称 INTEGRATING NETWORK USING AT LEAST ONE D-C AMPLIFIER
摘要 An integrating network for performing integration of an input voltage by the use of an integrator comprising time-constant means and a d-c amplifier, wherein a drift memory circuit is provided between the output and input of the integrator for feeding back in the opposite polarity the output of the d-c amplifier to the input of the integrator in a case of no input of the d-c amplifier so as to obtain a stationary condition and for continuously sending out, as a feedback signal, a voltage fed back to the input of the integrator at the stationary condition, the feedback signal having a value substantially equal to the drift voltage of the d-c amplifier converted in terms of the input of the d-c amplifier, whereby an input voltage is integrated in the integrating network without error caused by the drift of the d-c amplifier.
申请公布号 US3667055(A) 申请公布日期 1972.05.30
申请号 USD3667055 申请日期 1970.06.24
申请人 IWASAKI TSUSHINKI KK. 发明人 KOZO UCHIDA
分类号 G06G7/186;H03K4/06;H03M1/00;(IPC1-7):H03K5/00 主分类号 G06G7/186
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