| 摘要 |
A Gray Code counter includes first translator logic, binary incrementing/decrementing logic, second translator logic, and a clocked storage device. The first translator logic receives at an input a Gray Code number, Igray[n:0] which the first translator translates into a binary number, Ibin[n:0]. The binary incrementing/decrementing logic either increments or decrements the binary number Ibin[n:0] to produce an incremented/decremented binary number, Zbin[n:0]. The second translator logic translates the incremented/decremented binary number Zbin[n:0] into an incremented/decremented Gray Code number, Zgray[n:0]. The clocked storage device stores the incremented/decremented Gray Code number, Zgray[n:0]. The clocked storage device also feeds the incremented/decremented Gray Code number, Zgray[n:0], to the input of the first translator logic.
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