发明名称
摘要 PURPOSE:To improve the probability (of instruction restart after the processing of a fault generated in data read out from a branch history table. CONSTITUTION:This branch history table fault processing system is characteristically provided with branch instruction address buffer 3 constituting a branch history table, the 1st and 2nd parity check circuits 6,7 for detecting whether an error is included in data read out from a branched address buffer 4 or not, an AND circuit 9 for suppressing the propagation of error data from the branch history table at the time of detecting an error by the circuits 6, 7, and a parity check flag 11 for suppressing the supply of an instruction after detecting the error data by the circuits 6, 7. Since fault processing is started at the division of instructions, instruction processing can be restarted after ending the fault processing.
申请公布号 JP2793409(B2) 申请公布日期 1998.09.03
申请号 JP19920024950 申请日期 1992.02.12
申请人 NIPPON DENKI KK;KOFU NIPPON DENKI KK 发明人 MORISADA TAKESHI;KIMURA MASAYUKI
分类号 G06F9/38;G06F11/00;G06F11/14 主分类号 G06F9/38
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