发明名称 |
Semiconductor memory device having select circuit |
摘要 |
An input buffer circuit includes a first input buffer and a second input buffer. The first input buffer receives an external data signal and a reference potential to output an internal data signal. The second input buffer receives external data signals complementary to each other to output the internal data signal. The input buffer circuit causes either the first or second input buffer to operate in response to a control signal outputted from a control circuit. Due to this, this semiconductor memory device can correspond to various types of data processing systems.
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申请公布号 |
US6807108(B2) |
申请公布日期 |
2004.10.19 |
申请号 |
US20020266692 |
申请日期 |
2002.10.09 |
申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
MARUYAMA YUKIKO;ITOU TAKASHI |
分类号 |
G11C11/409;G11C7/10;G11C7/22;G11C11/407;(IPC1-7):G11C11/34 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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