发明名称 Nonvolatile memory device having wear-leveling control and method of operating the same
摘要 A method is provided for controlling a write operation in a nonvolatile memory device to provide wear leveling, where the nonvolatile memory device includes multiple memory blocks. The method includes reading write indication information with respect to at least a selected memory block of the multiple memory blocks; determining whether a write order of data to be stored in the selected memory block is an ascending order or a descending order, based on the write indication information of the selected memory block; and generating addresses of memory regions in the selected memory block in an ascending order when the write order of the data is determined to be an ascending order, and generating addresses of the memory regions in the selected memory block in a descending order when the write order is determined to be a descending order.
申请公布号 US9372790(B2) 申请公布日期 2016.06.21
申请号 US201313954135 申请日期 2013.07.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Lee Wonseok;Moon Youngkug;Kim Taek-Sung
分类号 G06F12/02 主分类号 G06F12/02
代理机构 Volentine & Whitt, PLLC 代理人 Volentine & Whitt, PLLC
主权项 1. A method of controlling a write operation in a nonvolatile memory device to provide wear leveling, the nonvolatile memory device comprising a plurality of memory blocks, the method comprising: reading write indication information with respect to at least a selected memory block of the plurality of memory blocks; determining whether a write order of data to be stored in the selected memory block is an ascending order or a descending order, based on the write indication information of the selected memory block; and generating addresses of memory regions in the selected memory block in an ascending order when the write order of the data is determined to be an ascending order, and generating addresses of the memory regions in the selected memory block in a descending order when the write order is determined to be a descending order, wherein the write indication information comprises, for each of the plurality of memory blocks, a respective power-on counting value that indicates the number of times the memory block has been powered on.
地址 Suwon-Si, Gyeonggi-do KR