发明名称 SEMICONDUCTOR MEMORY AND ITS READ-OUT METHOD
摘要 <p>PROBLEM TO BE SOLVED: To take out selectively information of a memory cell with one time access from multi-level information held in a memory cell transistor. SOLUTION: This device is provided with a memory section in which memory cell transistors 7-10 holding two kinds of data (high density ion, low density ion) and being able to store four states are arranged in a matrix state, a gate line selecting section 13 applying gate voltage VG to selected one out of word lines 3, 4, and applying it to gates of the memory cell transistors connected on the word lines, a current detecting circuit section 5 detecting a current value of a signal read out from bit lines 1, 2, converting current values on each bit line to data columns of a plurality of bits, and outputs them, and a read-out data deciding section 11 performing logical processing for each data column of a plurality of bits of which current values on each bit line by a selecting signal from a data selecting circuit section 14, and outputting it to an internal bus 12 as data of one bit.</p>
申请公布号 JP2002260391(A) 申请公布日期 2002.09.13
申请号 JP20010058316 申请日期 2001.03.02
申请人 HITACHI LTD;HITACHI ENG CO LTD;HITACHI HARAMACHI SEMICONDUCTOR LTD 发明人 HATANAKA TAKESHI;NUMATA MASAHIKO;OKAMURA HIDEKI
分类号 G11C16/04;G11C17/18;(IPC1-7):G11C16/04 主分类号 G11C16/04
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