SEMICONDUCTOR STORAGE DEVICE AND SEMICONDUCTOR STORAGE DEVICE CONTROL METHOD

摘要

A semiconductor storage device in which equalization of a bit line can be carried out with low power consumption while maintaining a normal access speed and a normal chip area and its control method are disclosed. In a shared sense amplifier semiconductor storage device, a bit line separation gate of a non-selected memory block is made conductive predetermined number of selections equal to or fewer than (k-1) out of continuous k selections of word line in a selected memory block during the active period of an equalizing section after a word line is selected. The circuit for equalizing the interconnection of high load component is driven with a higher voltage level depending on the load component of the interconnection between the sense amplifier power supply line and the bit line, and as a result the power supply line and the bit line are equalized in equivalent times, thereby preventing the short-circuit in the sense amplifier.