| 摘要 |
Densely-packed leaf cells for semiconductor integrated circuits are generated. The placement of transistors in a leaf cell is determined, and wire routings between the transistors are found on a gridded plane, and a compaction operation is performed on a placement/wiring result on the gridded plane. More specifically, locations of transistors in a leaf cell are determined (i) by a step of initializing a transistor grouping arranged in accordance with diffusion sharing, (ii) by a step of modifying the transistor grouping, (iii) by a step of finding locations of transistor in the modified transistor grouping, (iv) by a step of evaluating a result of the step (iii); and (v) by a step of making a judgment of whether to accept a result of step (iii) according to a result of step (iv).
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