High-speed high-density sram cell

摘要

A six-transistor SRAM of a high-density memory comprises two thin-film n-channel load transistors (10,12) and four conventional p-channel pull-down and access transistors (14,15,16,17). As embodied in a semiconductor chip, the cell is simpler than priorly known six-transistor cells and is relatively immune from the deleterious effects of sodium ions and hot-carrier aging.