CLOCK SYNCHRONIZATION SYSTEM IN PACKET NETWORK, ITS METHOD AND PROGRAM

摘要

By reducing the affect of network delay fluctuation, it is possible to realize an accurate clock synchronization between a master node and a slave node without causing an unstable self advance of a PLL. The master node transmits a time stamp packet to a slave node. The slave node classifies the time stamp packet according to a path. A transfer delay time of each time stamp is successively measured and its minimum value is obtained so as to derive a fixed delay of each path. According to the derived fixed delay, an offset of a fixed delay of each path is corrected. The derived fixed delay is subtracted from a packet transfer delay time to calculate a delay jitter of each packet. The delay jitter is compared to a threshold value and a time stamp packet including a delay jitter exceeding the threshold value is discarded. According to the time stamp packet, a clock of the slave node is reproduced.