发明名称 Semiconductor device e.g. application specific integrated circuit chip, includes macro cell distributed to periphery functional block on semiconductor chip
摘要 Macro cells (51-54) have predecoder to which output of fuse circuit is supplied. The macro cell which is not connected with upper wiring is distributed to the periphery of functional block on semiconductor chip (10A). The macro cell base memory circuit (20) is distributed to the inner side of semiconductor chip (10A). The memory circuit has memory blocks. The defect in a memory block is detected using switching signal and switching circuit rectifies the defect. A signal conversion circuit converts the output signal of main decoder (33) and generates a switching signal. An Independent claim is also included for layout design procedure on semiconductor chip.
申请公布号 DE19947976(A1) 申请公布日期 2000.05.04
申请号 DE19991047976 申请日期 1999.10.05
申请人 FUJITSU LTD., KAWASAKI 发明人 SHIMIZU, HIROSHI;AOYAMA, KEIZO
分类号 G11C11/413;G11C11/41;G11C29/04;H01L21/82;H01L27/10;H01L27/118;(IPC1-7):H01L27/118;H01L23/525 主分类号 G11C11/413
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