发明名称 Method of and apparatus for discriminating NaN
摘要 PCT No. PCT/JP93/01232 Sec. 371 Date Jun. 17, 1994 Sec. 102(e) Date Jun. 17, 1994 PCT Filed Aug. 31, 1993 PCT Pub. No. WO94/06075 PCT Pub. Date Mar. 17, 1994.When processing a binary floating-point number in the IEEE form, whether or not the data is NaN can be discriminated irrespective of a precision thereof. The binary floating-point number having sign, exponent and fraction parts is based on the IEEE form in which the data is defined as NaN on condition that "all values of respective bits of the exponent part are '1', and all values of respective bits of the fraction part are not '0'". In this binary floating-point number, if a precision of the binary floating-point is the maximum precision, the data is set intactly as internal representation form data. If the precision is less than the maximum precision, the following transform is executed. The sign part is set as it is. The exponent part is extended to a number of bits of the exponent part of the maximum precision, and deficient bits due to this extension are filled with '1'. The fraction part is extended to a number of bits of the maximum precision, and deficient bits due to this extension are filled with '0'. A result of this transform turns out the internal representation form data. With this internal representation form data, a NaN discriminating process is performed en bloc on all the data as maximum precision data.
申请公布号 US5481489(A) 申请公布日期 1996.01.02
申请号 US19940232001 申请日期 1994.06.17
申请人 FUJITSU LIMITED 发明人 YANAGIDA, MASAHIRO;TAKAHASHI, HIROMASA;TACHIBANA, OSAMU
分类号 G06F7/57;(IPC1-7):G06F7/38 主分类号 G06F7/57
代理机构 代理人
主权项
地址