| 摘要 |
With the aim of suppressing power consumption and reducing circuit size, a positive FET is turned on in accordance with a positive pulse signal and turned off when a return voltage rises up to a positive threshold. An active ground clamp circuit causes the output line to return to the ground voltage after the elapse of a predetermined period of time. A negative FET is turned on in accordance with a negative pulse signal and turned off when the return voltage falls down to a negative threshold. The active ground clamp circuit causes the output line to return to the ground voltage after the elapse of a predetermined period of time.
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