METHOD AND APPARATUS FOR VISUALIZING TIMING MARGIN ON A GRAPHICAL USER INTERFACE

摘要

A system and method are provided that enable the analysis of the timing slack for block-to-block connections. Based on the analysis of the timing slack for block-to-block connections, timing path slack values are determined and used to render a presentation of the timing path slack values along with a presentation of the block-to-block connections in a rendering of a circuit design.

主权项

1. A method for visualizing timing margin of an Integrated Circuit design, comprising:
analyzing timing path slack for block-to-block connections in the Integrated Circuit design; based on the analysis, determining a timing path slack value for each of the block-to-block connections; associating the timing path slack value with each block in the block-to-block connection; and presenting the timing path slack value along with at least one of: (i) a presentation of the block-to-block connection and (ii) an identifier of each block in the block-to-block connection.