发明名称 ANALOG/DIGITAL CONVERTER
摘要 PURPOSE:To reduce an offset error and a gain error by using an input for caligration and making corrections of actual read data properly. CONSTITUTION:A reference voltage Vref is used to compare the absolute value of an analog input voltage successively from the most significant digit bit. A differential amplifier A calculates and amplifies the difference between two inputs e1 and e2 supplied by operating switches S1-S8 selectively, and an output e0 is obtained by operating switches S9-S12 selectively. Sample holding circuits SH1 and SH2 sample and hold the output e0 of the differential amplifier A. A comparator CMP1 compares the output e0 of the differential amplifier A with the Vref supplied through switches S15 and S16. A control circuit CONT generates control signals necessary for respective parts while considering the output state of the cmparator CMP.
申请公布号 JPS59160318(A) 申请公布日期 1984.09.11
申请号 JP19830034119 申请日期 1983.03.02
申请人 YOKOGAWA HOKUSHIN DENKI KK 发明人 SANO NAOKI
分类号 H03M1/10;H03M1/40 主分类号 H03M1/10
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