发明名称 Method and bus prefetching mechanism for implementing enhanced buffer control
摘要 A method, and bus prefetching mechanism are provided for implementing enhanced buffer control. A computer system includes a plurality of masters and at least one slave exchanging data over a system bus and the slave prefetches read data under control of a master. The master generates a continue bus signal that indicates a new or a continued request. The master generates a prefetch bus signal that indicates an amount to prefetch including no prefetching. The master includes a mechanism for continuing a sequence of reads allowing prefetching until a request is made indicating a prefetch amount of zero.
申请公布号 US7328312(B2) 申请公布日期 2008.02.05
申请号 US20050050295 申请日期 2005.02.03
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DRERUP BERNARD CHARLES;NICHOLAS RICHARD;WOLFORD BARRY JOE
分类号 G06F13/28;G06F12/00 主分类号 G06F13/28
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