| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock signal switching circuit capable of switching a clock signal surely by eliminating collision of a clock signals before/after switching or missing of the clock signal. <P>SOLUTION: The clock signal switching circuit comprises a frequency division circuit 1, a synchronization circuit 2 and a clock selection circuit 3, wherein the clock selection circuit 3 comprises a first clock enabler 31, a second clock enabler 32 and an OR circuit 33. The first clock enabler 31 has a clock enable terminal E being fed with a second clock switching signal, and a clock input terminal CK being fed with a frequency division clock XI/2. The second clock enabler 32 has a clock enable terminal E being fed with a first clock switching signal, and a clock input terminal CK being fed with a clock signal XI. A clock signal selected by the first clock enabler 31 or the second clock enabler 32 is outputted through the OR circuit 33. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
