发明名称 DIFFERENTIAL INTERCONNECT TOPOLOGY IN A SUBSTRATE WITH STAGGERED VIAS
摘要 An interconnect topology is disclosed that includes a plurality of interconnections, each of which is coupled together using a via, where at least two of the vias are staggered with respect to each other. In one embodiment, the interconnect topology comprises a substrate, multiple signal traces routed through the substrate on multiple layers, and a plurality of vias, where each via couples a pair of the signal traces to form an interconnection between different ones of the multiple layers, and where a pair of vias comprise a first via to carry a positive differential signal via and a second via to carry a negative differential signal that are coupled to signal traces to form a differential signal pair. The differential first and second vias are staggered with respect to each other.
申请公布号 US2016172734(A1) 申请公布日期 2016.06.16
申请号 US201414570791 申请日期 2014.12.15
申请人 Intel Corporation 发明人 Wang Min;Shryock Russell N.
分类号 H01P3/08 主分类号 H01P3/08
代理机构 代理人
主权项 1. An interconnect topology comprising: a substrate; a plurality of signal traces routed through the substrate on a plurality of layers; and a plurality of vias, each via coupling a pair of signal traces in the plurality of signal traces to form an interconnection between different layers of the plurality of layers, and wherein a pair of the plurality of vias comprise first via to carry a positive differential signal and a second via to carry a negative differential signal, the first and second vias being coupled to signal traces of the plurality of traces to form a differential signal pair, the first and second vias being staggered with respect to each other.
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