| 摘要 |
An integrated circuit structure including multiple thin film resistors having different sheet resistances and TCRs includes a first oxide layer ( 2 ) formed on a semiconductor substrate ( 1 ), a first thin film resistor ( 3 ) disposed on the first oxide layer ( 2 ), and a second oxide layer ( 14 ) disposed over the first oxide layer ( 2 ) and first thin film resistor ( 3 ). A second thin film resistor ( 15 ) is formed on the second oxide layer ( 14 ) and a third oxide layer ( 16 ) is formed over the second thin film resistor ( 15 ) and the second oxide layer ( 14 ). Interconnect metallization elements ( 12 A,B & 22 A,B) disposed on at least one of the second ( 14 ) and third ( 16 ) oxide layers electrically contact the circuit element ( 4 ), terminals of the first thin film resistor ( 3 ), and terminals of the second thin film resistor ( 15 ), respectively, through corresponding contact openings through at least one of the second ( 14 ) and third ( 16 ) oxide layers.
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