发明名称 Digital-to-analog converter with bit weight segmented arrays
摘要 A DAC embodied in a CMOS integrated circuit converts a multi-bit digital signal to an analog-current signal. A higher-order portion of the digital signal, e.g., the most significant 5 bits of a byte, are decoded separately from the lower-order portion, e.g., the 3 least significant bits. The DAC includes circuitry for producing a first bias voltage, a first set of current sources each biased by the first bias voltage to produce a switchable current having a unit magnitude, and switching circuitry controlled by the decoded lower-order portion to cause a selected number of the unit-magnitude currents to contribute to the analog-current signal. The DAC further includes circuitry for producing a second bias voltage, a second set of current sources each biased by the second bias voltage to produce a switchable current having a multi-unit magnitude, and switching circuitry controlled by the decoded higher-order portion to cause a selected number of the multi-unit-magnitude currents to contribute to the analog-current signal.
申请公布号 US5017919(A) 申请公布日期 1991.05.21
申请号 US19900533885 申请日期 1990.06.06
申请人 WESTERN DIGITAL CORPORATION 发明人 HULL, RICHARD W.;O'SHAUGHNESSY, TIMOTHY G.
分类号 H03M1/68;H03M1/74 主分类号 H03M1/68
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