| 发明名称 | Semiconductor device and method of manufacturing the same | ||
| 摘要 | According to one embodiment, a semiconductor device includes a metal interconnect and a graphene interconnect which are stacked to one another. | ||
| 申请公布号 | US9431345(B2) | 申请公布日期 | 2016.08.30 |
| 申请号 | US201314022505 | 申请日期 | 2013.09.10 |
| 申请人 | Kabushiki Kaisha Toshiba | 发明人 | Sakata Atsuko;Kitamura Masayuki;Wada Makoto;Katagiri Masayuki;Yamazaki Yuichi;Kajita Akihiro |
| 分类号 | H01L23/48;H01L23/52;H01L29/40;H01L23/532;H01L21/768;H01L23/528 | 主分类号 | H01L23/48 |
| 代理机构 | Finnegan, Henderson, Farabow, Garrett & Dunner, LLP | 代理人 | Finnegan, Henderson, Farabow, Garrett & Dunner, LLP |
| 主权项 | 1. A semiconductor device comprising: a plug; a metal interconnect; a graphene interconnect; and an insulation region, wherein the plug is formed in the insulation region, electrically connected to the metal interconnect, and has a top surface and a bottom surface parallel with each other, and side surfaces between the top surface and the bottom surface,the metal interconnect includes a main body portion and a barrier metal portion provided on a bottom surface and side surfaces of the main body portion, a top surface of the main body portion being located lower than a top surface of the barrier metal portion,the graphene interconnect is formed on the top surface of the main body portion, on the insulation region and on portions of the side surfaces of the plug, andthe insulation region has an inclined surface around the plug. | ||
| 地址 | Tokyo JP | ||