| 发明名称 | Electronic device | ||
| 摘要 | An electronic device comprising a laminate comprising pluralities of insulator layers each provided with conductor patterns, and an amplifier-constituting semiconductor device mounted to a mounting electrode formed on an upper surface of the laminate, a first ground electrode being formed on an insulator layer near an upper surface of the laminate; a second ground electrode being formed on an insulator layer near a lower surface of the laminate; the first ground electrode being connected to the mounting electrode through pluralities of via-holes; conductor patterns constituting the first circuit block being disposed in a region below the amplifier-constituting semiconductor device between the first ground electrode and the second ground electrode; and at least part of a conductor pattern for a line connecting the first circuit block to the amplifier-constituting semiconductor device being disposed on an insulator layer sandwiched by the mounting electrode and the first ground electrode. | ||
| 申请公布号 | US9351404(B2) | 申请公布日期 | 2016.05.24 |
| 申请号 | US201113989292 | 申请日期 | 2011.11.21 |
| 申请人 | HITACHI METALS, LTD. | 发明人 | Satake Hirotaka |
| 分类号 | H05K1/18;H01P1/20;H01P1/203;H01L23/552;H01L23/66;H03F3/24;H03F3/60;H03F3/195;H01L23/367;H01L23/498;H01L23/50;H01L23/00 | 主分类号 | H05K1/18 |
| 代理机构 | Sughrue Mion, PLLC | 代理人 | Sughrue Mion, PLLC |
| 主权项 | 1. An electronic device comprising: a laminate comprising pluralities of insulator layers each provided with conductor patterns, and an amplifier-constituting semiconductor device mounted to a mounting electrode formed on an upper surface of said laminate, a first ground electrode being formed on an insulator layer near an upper surface of said laminate; a second ground electrode being formed on an insulator layer near a lower surface of said laminate; said first ground electrode being connected to said mounting electrode through pluralities of via-holes; conductor patterns constituting a first circuit block being disposed in a region below said amplifier-constituting semiconductor device between said first ground electrode and said second ground electrode, and at least part of a conductor pattern for a line connecting said first circuit block to said amplifier-constituting semiconductor device being disposed on an insulator layer sandwiched by said mounting electrode and said first ground electrode, the at least part of the conductor pattern overlapping the mounting electrode and the first ground electrode in a lamination direction. | ||
| 地址 | Tokyo JP | ||