发明名称 |
FREQUENCY DIVIDER, CLOCK GENERATING APPARATUS, AND METHOD CAPABLE OF CALIBRATING FREQUENCY DRIFT OF OSCILLATOR |
摘要 |
A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus. |
申请公布号 |
US2016197599(A1) |
申请公布日期 |
2016.07.07 |
申请号 |
US201615067141 |
申请日期 |
2016.03.10 |
申请人 |
MEDIATEK INC. |
发明人 |
Ying Yu-Ming;Liu Shiue-Shin |
分类号 |
H03K3/013;H03L1/02;H03L7/197;H03K7/06 |
主分类号 |
H03K3/013 |
代理机构 |
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代理人 |
|
主权项 |
1. A clock generating apparatus, comprising:
an oscillator, for generating a reference clock signal; and a fractional divider, directly or indirectly coupled to the oscillator, for receiving the reference clock signal and outputting a target clock signal, wherein the target clock signal is adjusted according to at least a process related parameter and/or at least a temperature related parameter, wherein the fractional divider is an open-loop circuit. |
地址 |
Hsin-Chu TW |