发明名称 Array substrate, method for producing the array substrate, and display apparatus
摘要 An array substrate of a liquid crystal display, comprising: a substrate; a first electrode disposed on the substrate; a second electrode located above and electrically insulated from the first electrode; and an orientation film disposed on the second electrode, wherein the array substrate further comprising: at least one shunt electrode connected to at least one of first electrodes to divert residual charges left over a surface of a liquid crystal molecule, and the shunt electrode is located at a side of the orientation film not contacting the liquid crystal molecule.
申请公布号 US9417493(B2) 申请公布日期 2016.08.16
申请号 US201314084225 申请日期 2013.11.19
申请人 BOE TECHNOLOGY GROUP CO., LTD.;HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. 发明人 Cao Binbin;Kee Baek Myoung;Huang Yinhu;Xu Xiangyang
分类号 G02F1/1343;G02F1/1362;G02F1/1333 主分类号 G02F1/1343
代理机构 Kinney & Lange, P.A. 代理人 Kinney & Lange, P.A.
主权项 1. An array substrate of a liquid crystal display, comprising: a substrate; a plurality of first electrodes disposed on the substrate; a plurality of second electrodes located above and electrically insulated from the plurality of first electrodes; an orientation film disposed on the plurality of second electrodes; and a plurality of shunt electrodes connected to the plurality of first electrodes to divert residual charges left over a surface of a liquid crystal molecule, the plurality of shunt electrodes being located at a side of the orientation film not contacting with the liquid crystal molecule, wherein the plurality of first electrodes are each connected to multiple ones of the plurality of shunt electrodes, and the plurality of shunt electrodes are evenly arranged on the array substrate, wherein the array substrate is further provided with a data signal line and/or a gate electrode scan line thereon, wherein each of the plurality of shunt electrodes is fully covered by the data signal line and/or the gate electrode scan line and located between two adjacent sub-pixel units in plan view, and wherein a width of each of the plurality of shunt electrodes is two thirds of a width of the gate electrode scan line or the data signal line, and wherein each of the plurality of shunt electrodes is formed in a rectangle shape with a width of 3˜20 μm and a length of 3˜30 μm.
地址 Beijing CN