发明名称 SEMICONDUCTOR MEMORY ELEMENT
摘要 <p>PROBLEM TO BE SOLVED: To prevent the occurrence of a leakage current and, at the same time, to accurately output the state of a fuse by canceling the connection between an output node and a second power source at arbitrary timing when it is detected that the power supply voltage of an external power source is stabilized. SOLUTION: When the lower level of an output OUT2 is inputted to the gate of a PMOS transistor MP2, supplied power Vcc is connected to a node N6 and the potential at the node N6 is maintained at a high level. When a fuse FUSE2 is opened, on the other hand, a node N2 is set to the low level of grounding power Vss and the output OUT2 becomes a high level. Since the high-level output OUT2 is inputted to the gate of an NMOS transistor MN2 in a latch section and turns on the transistor MN2, the node N2 is connected to the grounding power Vss and the input of an inversion element INV2 is maintained at a low level.</p>
申请公布号 JPH08321197(A) 申请公布日期 1996.12.03
申请号 JP19960018656 申请日期 1996.02.05
申请人 L JII SEMIKON CO LTD 发明人 YAN SUN JIYO
分类号 G11C17/14;G11C17/00;G11C17/18;G11C29/00;G11C29/04;(IPC1-7):G11C17/14 主分类号 G11C17/14
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