| 摘要 |
PURPOSE:To prevent a controller from running into trouble by performing processing needed to stop control operation on detecting abnormal output operation by automatically checking whether an output circuit is abnormal or not. CONSTITUTION:Input data inputting to input circuit 1 is loaded into shift register 2 by a load signal supplied from control part 6 and the data supplied to this register 2 is converted, by a shift clock supplied from control part 6, into series data, which is stored in memory part 3 as input data in sequence. Further, the data stored in memory part 3 is processed by arithmetic part 4, the data from which is temporarily stored in memory part 3; and this processed output data is converted by register 2 into series and parallel data, which are latched by output circuit 5. Then, the output signal of register 2 and the output data stored in memory part 3 are compared with each other by comparison part 7, which generates an output showing that there is no abnormality when their coincidence is detected or that of output circuit 5 when dissidence. |
