发明名称 TRANSISTOR DE SELECTION D'UNE CELLULE MEMOIRE
摘要 The disclosure relates to an integrated circuit comprising a transistor comprising first and second conduction terminals and a control terminal. The integrated circuit further comprises a stack of a first dielectric layer, a conductive layer, and a second dielectric layer, the first conduction terminal comprising a first semiconductor region formed in the first dielectric layer, the control terminal comprising a second semiconductor region formed in the conductive layer, and the second conduction terminal comprising a third semiconductor region formed in the second dielectric layer.
申请公布号 FR3000842(B1) 申请公布日期 2016.07.29
申请号 FR20130050133 申请日期 2013.01.08
申请人 STMICROELECTRONICS (ROUSSET) SAS 发明人 BOIVIN PHILIPPE;LA ROSA FRANCESCO;DELALLEAU JULIEN
分类号 H01L29/732;G11C11/21 主分类号 H01L29/732
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