发明名称 TIME SLOT COMPLETENESS CIRCUIT
摘要 <p>Apparatus and method are disclosed for checking the time slot data word integrity of data communications in a time multiplexed communication system. A predetermined control bit of each data word of a data frame is alternately switched from its normal control bit function to a bit of a pseudo random sequence (PRS) for time slot data word integrity checking. During alternate data frames a checking circuit compares the predetermined bit of received consecutive data words against consecutive bits of a reference PRS and outputs a time slot cross connect error signal when a difference occurs.</p>
申请公布号 JPS60260291(A) 申请公布日期 1985.12.23
申请号 JP19850108461 申请日期 1985.05.22
申请人 AMERICAN TELEPHONE AND TELEGRAPH CO 发明人 JIEEMUSU JIYOSEFU FUERENKU
分类号 H04J3/14;H04L1/24;H04M3/24;H04Q11/04 主分类号 H04J3/14
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