发明名称 Low-power low-jitter variable delay timing circuit
摘要 The timing circuit includes at least one delay element and its supply voltage is obtained from an active current source. The current source is a current mirror which is driven by a differential amplifier. The differential amplifier compares a voltage on the delay element supply line to a voltage on a current control node connected to a voltage controlled current source. An RC compensating circuit may be coupled to the current control node.
申请公布号 US6476656(B2) 申请公布日期 2002.11.05
申请号 US20010925753 申请日期 2001.08.09
申请人 VELIO COMMUNICATIONS, INC. 发明人 DALLY WILLIAM J.;FARJAD-RAD RAMIN;STONE TEVA J.;YU XIAOYING;POULTON JOHN W.
分类号 G05F3/26;(IPC1-7):H03H11/26 主分类号 G05F3/26
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