发明名称 Copper reflow process
摘要 A manufacturable method for forming a highly reliable electrical interconnection. An electrical interconnection pattern is first formed in a dielectric layer on a semiconductor substrate as recessed regions in the dielectric layer. A conductive layer primarily comprising copper is thereafter deposited over the surface and in the recessed regions of the dielectric layer. The conductive layer is then reflowed to fill the recessed regions of the dielectric layer with substantially no void formation. This reflow process may also be used to improve the step coverage of any such copper layer deposited over the surface of a substrate to be used in conjunction with alternate techniques for forming electrical interconnections including photoresist patterning and etch.
申请公布号 US6475903(B1) 申请公布日期 2002.11.05
申请号 US19930175200 申请日期 1993.12.28
申请人 INTEL CORPORATION 发明人 GARDNER DONALD S.
分类号 H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/768
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