发明名称 Method of static timing verification
摘要 A STA tool (25) executes static timing verification of an LSI (11) having a first circuit block (12) and a second circuit block (13). The first circuit block (12) operates on an external clock signal (CLK1) and generates an internal clock signal (CLK2), whereas the second circuit block (12) operates on the internal clock signal (CLK2), and transfers data between the same and the first circuit block (12). The timing of an event occurring in the first circuit block (12) based on the external clock signal (CLK1) is converted into the timing in terms of the internal clock signal (CLK2), and compared against the timing of the data transfer from the second circuit block (12). The STA operates substantially without additional information after some clock information is supplied before starting operation. <IMAGE>
申请公布号 EP0996073(A2) 申请公布日期 2000.04.26
申请号 EP19990121176 申请日期 1999.10.22
申请人 NEC CORPORATION 发明人 ARIMITSU, HITOSHI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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