发明名称 |
EEPROM CELL USING P-WELL FOR TUNNELING ACROSS A CHANNEL |
摘要 |
An EEPROM cell is described that is programmed and erased by electron tunneling across an entire portion of separate transistor channels. The EEPROM cell has three transistors formed in a P-well of a semiconductor substrate. The three transistors are a tunneling transistor (NMOS), a sense transistor (NMOS) and a read transistor (NMOS). Electron tunneling occurs to program the EEPROM cell through a sense tunnel oxide layer upon incurrence of a sufficient voltage potential between a floating gate and the sense channel. Electron tunneling also occurs to erase the EEPROM cell through a tunnel oxide layer upon incurrence of a sufficient voltage potential between the floating gate and the tunneling channel.
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申请公布号 |
WO0038239(A1) |
申请公布日期 |
2000.06.29 |
申请号 |
WO1999US29916 |
申请日期 |
1999.12.15 |
申请人 |
LATTICE SEMICONDUCTOR CORPORATION |
发明人 |
MEHTA, SUNIL, D.;LI, XIAO-YU |
分类号 |
G11C16/04;H01L21/8247;H01L27/115;(IPC1-7):H01L27/115 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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